From 490160ef43136000563cece95d704829d8f10c4f Mon Sep 17 00:00:00 2001 From: Wunkolo Date: Thu, 5 Nov 2020 14:52:33 -0800 Subject: [PATCH] emit_x64_vector: GNFI implementation of ArithmeticShiftRightByte The bit-matrix is generated up-front and added to the constant-pool. I'm using an embedded 64-bit broadcast here(m64bcst) which is the particular EVEX encoded version of the instruction with AVX512VL+GNFI. If it ever really matters, then we would ideally detect specific host features like bare-GFNI and specific subsets of AVX512 and emit the assembly based on that rather than by the entire Icelake uarch. --- src/backend/x64/emit_x64_vector.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/backend/x64/emit_x64_vector.cpp b/src/backend/x64/emit_x64_vector.cpp index 9ca8f0d2..f5fc6ee0 100644 --- a/src/backend/x64/emit_x64_vector.cpp +++ b/src/backend/x64/emit_x64_vector.cpp @@ -439,6 +439,14 @@ void EmitX64::EmitVectorAnd(EmitContext& ctx, IR::Inst* inst) { } static void ArithmeticShiftRightByte(EmitContext& ctx, BlockOfCode& code, const Xbyak::Xmm& result, u8 shift_amount) { + if (code.HasAVX512_Icelake()) { + // Do a logical shift right upon the 8x8 bit-matrix, but shift in + // `0x80` bytes into the matrix to repeat the most significant bit. + const u64 zero_extend = ~(~0ull << (shift_amount)) & 0x8080808080808080; + const u64 shift_matrix = (0x0102040810204080 >> (shift_amount * 8)) | zero_extend; + code.vgf2p8affineqb(result, result, code.MConst(xword_b, shift_matrix), 0); + return; + } const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm(); code.punpckhbw(tmp, result);