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frontend: Fix MSVC narrowing conversion warning for VectorSignedSaturatedShiftLeftUnsigned argument

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Merry 2022-08-07 13:30:10 +01:00 committed by merry
parent f4747aea10
commit 882490b372
3 changed files with 3 additions and 3 deletions
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2
src/dynarmic/frontend/A32/translate/impl/asimd_two_regs_shift.cpp
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@ -236,7 +236,7 @@ bool TranslatorVisitor::asimd_VQSHL(bool U, bool D, size_t imm6, size_t Vd, bool
return ir.VectorUnsignedSaturatedShiftLeft(esize, reg_m, shift_vec); return ir.VectorUnsignedSaturatedShiftLeft(esize, reg_m, shift_vec);
} }
return ir.VectorSignedSaturatedShiftLeftUnsigned(esize, reg_m, shift_amount); return ir.VectorSignedSaturatedShiftLeftUnsigned(esize, reg_m, static_cast<u8>(shift_amount));
} }
if (op) { if (op) {
return ir.VectorSignedSaturatedShiftLeft(esize, reg_m, shift_vec); return ir.VectorSignedSaturatedShiftLeft(esize, reg_m, shift_vec);

2
src/dynarmic/frontend/A64/translate/impl/simd_scalar_shift_by_immediate.cpp
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@ -56,7 +56,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, Imm<4> immh, Imm<3> immb, Vec Vn,
return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift); return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift);
} }
return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, shift_amount); return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, static_cast<u8>(shift_amount));
}(); }();
v.ir.SetQ(Vd, result); v.ir.SetQ(Vd, result);

2
src/dynarmic/frontend/A64/translate/impl/simd_shift_by_immediate.cpp
View File

@ -182,7 +182,7 @@ bool SaturatingShiftLeft(TranslatorVisitor& v, bool Q, Imm<4> immh, Imm<3> immb,
return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift_vec); return v.ir.VectorUnsignedSaturatedShiftLeft(esize, operand, shift_vec);
} }
return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, shift); return v.ir.VectorSignedSaturatedShiftLeftUnsigned(esize, operand, static_cast<u8>(shift));
}(); }();
v.V(datasize, Vd, result); v.V(datasize, Vd, result);