Azahar-Mirror/dynarmic
1
0
Fork 0
mirror of https://github.com/azahar-emu/dynarmic synced 2025-11-14 19:09:59 +01:00
Code Issues Packages Projects Releases Wiki Activity

Implement *MULH

Browse Source
This commit is contained in:
Liam 2022-11-13 15:10:23 -05:00
parent 5b6e2add82
commit bdc1b0f590
1 changed files with 14 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/dynarmic/backend/arm64/emit_arm64_data_processing.cpp
View File

@ -1051,18 +1051,24 @@ void EmitIR<IR::Opcode::Mul64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR
template<> template<>
void EmitIR<IR::Opcode::SignedMultiplyHigh64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::SignedMultiplyHigh64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx; auto Xresult = ctx.reg_alloc.WriteX(inst);
(void)inst; auto Xop1 = ctx.reg_alloc.ReadX(args[0]);
ASSERT_FALSE("Unimplemented"); auto Xop2 = ctx.reg_alloc.ReadX(args[1]);
RegAlloc::Realize(Xresult, Xop1, Xop2);
code.SMULH(Xresult, Xop1, Xop2);
} }
template<> template<>
void EmitIR<IR::Opcode::UnsignedMultiplyHigh64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::UnsignedMultiplyHigh64>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx; auto Xresult = ctx.reg_alloc.WriteX(inst);
(void)inst; auto Xop1 = ctx.reg_alloc.ReadX(args[0]);
ASSERT_FALSE("Unimplemented"); auto Xop2 = ctx.reg_alloc.ReadX(args[1]);
RegAlloc::Realize(Xresult, Xop1, Xop2);
code.UMULH(Xresult, Xop1, Xop2);
} }
template<> template<>