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A64: Amend prototypes of some SIMD scalar shift by immediate opcodes

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These take a vector for a destination.
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Lioncash 2019-03-07 23:59:07 -05:00 committed by MerryMage
parent bbd5330ad2
commit dd7433f9d3
1 changed files with 6 additions and 6 deletions
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12
src/frontend/A64/translate/impl/impl.h
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@ -622,8 +622,8 @@ struct TranslatorVisitor final {
bool SRSRA_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SRSRA_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SHL_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SHL_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SQSHL_imm_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SQSHL_imm_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SQSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Reg Rd); bool SQSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SQRSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Reg Rd); bool SQRSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SCVTF_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SCVTF_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool FCVTZS_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool FCVTZS_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool USHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool USHR_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
@ -634,10 +634,10 @@ struct TranslatorVisitor final {
bool SLI_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SLI_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SQSHLU_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool SQSHLU_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool UQSHL_imm_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool UQSHL_imm_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SQSHRUN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Reg Rd); bool SQSHRUN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool SQRSHRUN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Reg Rd); bool SQRSHRUN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool UQSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Reg Rd); bool UQSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool UQRSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Reg Rd); bool UQRSHRN_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool UCVTF_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool UCVTF_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);
bool FCVTZU_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd); bool FCVTZU_fix_1(Imm<4> immh, Imm<3> immb, Vec Vn, Vec Vd);