Merry
fb3b828158
backend/arm64: Implement Identity
2022-10-18 15:04:30 +01:00
Merry
97ba8a0f14
backend/arm64: Implement Void
2022-10-18 15:04:30 +01:00
Merry
2a24bb2c1e
backend/arm64: Implement Breakpoint
2022-10-18 15:04:30 +01:00
Merry
3a11467220
backend/arm64: Stub all IR instruction implementations
2022-10-18 15:04:30 +01:00
Merry
402abf5ea3
backend/arm64: Implement A32GetExtendedRegister
2022-10-18 15:04:30 +01:00
Merry
84cad9f831
backend/arm64: Implement A32SetCheckBit
2022-10-18 15:04:30 +01:00
Merry
52a46d841b
backend/arm64: Implement A32BXWritePC
2022-10-18 15:04:30 +01:00
Merry
67dc7f2e4e
backend/arm64: Implement A32UpdateUpperLocationDescriptor
2022-10-18 15:04:30 +01:00
Merry
00ad84b7ab
backend/arm64: Initial implementation of terminals
2022-10-18 15:04:30 +01:00
Merry
80c89401b9
a32_address_space: Add StackLayout to stack
2022-10-18 15:04:30 +01:00
Merry
9b2391ec7b
backend/arm64/reg_alloc: Implement AssertNoMoreUses
2022-10-18 15:04:30 +01:00
Merry
8e6467bf45
backend/arm64/reg_alloc: Add flag handling
2022-10-18 15:04:30 +01:00
Merry
77436bbbbb
backend/arm64: Toy implementation of enough to execute LSLS
2022-10-18 15:04:30 +01:00
Merry
7e046357ff
backend/arm64: Initial implementation of register allocator
2022-10-18 15:04:30 +01:00
Merry
3bf2b0aba9
backend/arm64: Adjust how relocations are stored
2022-10-18 15:04:30 +01:00
Merry
e0f091b6a6
backend/arm64: void* -> CodePtr
2022-10-18 15:04:30 +01:00
Merry
f6e80f1e0e
backend/arm64: First dummy code execution
2022-10-18 15:04:30 +01:00
Merry
d877777c50
backend/arm64: Initial framework
2022-10-18 15:04:30 +01:00
Wunkolo
e886bfb7c1
backend/x64: Fix FixupLUT argument order
...
The last two arguments(fixup response response for finite values) are
neg-pos, not pos-neg. Found this out while re-using this function for
some math stuff. Thankfully nothing currently uses this fixup response
at the moment.
2022-09-30 23:10:21 +01:00
Merry
af51845a53
decoder_detail: Workaround #708
2022-09-02 21:16:43 +01:00
Bart Ribbers
e49fee0ca1
block_of_code: rename PAGE_SIZE to DYNARMIC_PAGE_SIZE to prevent use of reserved name
...
PAGE_SIZE is a kernel symbol and depending on the libc in use, it will
"leak". In this case dynarmic was using it's own PAGE_SIZE and in
combination with the Musl libc the compiler would complain it was overwriting
the kernel symbol
2022-08-25 23:32:18 +01:00
Merry
bf422a190a
decoder_detail: Simplify DYNARMIC_DECODER_GET_MATCHER
2022-08-21 18:22:14 +01:00
Merry
c60fd3f0ac
block_of_code: Fix running under Rosetta
...
Rosetta doesn't have accurate emulation of the sahf instruction
2022-08-05 23:43:01 +01:00
Merry
a38966a874
block_of_code: Extract flag loading into a function
...
LoadRequiredFlagsForCondFromRax
2022-08-05 23:42:19 +01:00
Merry
d7bd5bb7a7
emit_x64: Use movzx(eax, ah) instead of emitting byte equivalent
...
Emission fixed in xbyak v6.61
2022-07-31 17:52:35 +01:00
Merry
f33c6f062b
Revert "block_of_code: Refactor MConst to Xmm{B}Const"
...
This reverts commit 5d9b720189a64eec7f35f844320d0b30ca3997f3.
Obscure bugs resulting from this commit due to assumptions regarding zero-extension of higher bits.
2022-07-27 20:31:08 +01:00
Merry
fbdcfeab99
emit_x64_packed: Do not use XmmBConst here
...
Broadcasting is inappropriate
2022-07-27 20:14:49 +01:00
Merry
1f51dceb60
Update for fmt 9.0.0
2022-07-26 11:20:47 +01:00
Merry
82d71b850e
a32_emit_x64: Bugfix for A32GetCpsr for non-FastBMI2
...
Incorrect loading of E and T flags
2022-07-26 10:44:30 +01:00
Merry
a2b3199adf
Convert NZCV to C flag where able
2022-07-23 11:46:07 +01:00
Merry
6bcc424e1a
emit_x64_vector: Ensure FPSR.QC is set even if output is invalidated
2022-07-20 19:44:39 +01:00
Merry
34cb465fc7
translate_thumb: IsThumb16: Mask not required
2022-07-20 17:34:31 +01:00
Merry
72c87d11e4
a32_get_set_elimination_pass: Correct insertion point
2022-07-20 16:53:48 +01:00
Merry
da2b1c5724
a32_get_set_elimination_pass: Convert NZ to NZC
2022-07-20 16:45:14 +01:00
Merry
6f106602ba
a32_get_set_elimination_pass: Add option to disable NZC -> NZ conversion
2022-07-20 16:42:39 +01:00
Merry
52aa68c31c
backend/x64: Fixup NZ flag emission
2022-07-20 14:58:28 +01:00
Merry
b97147e187
a32_get_set_elimination_pass: Reduce NZC to 00C
2022-07-20 14:44:33 +01:00
Merry
03dcc3fa50
a32_get_set_elimination_pass: Reduce NZC to NZ where possible
2022-07-20 14:08:41 +01:00
Merry
cf08130f2c
A32: Condense flag handling
...
Remove individual flag handlers, and handle them in chuks where able, to produce more optimal code.
2022-07-19 22:05:13 +01:00
Merry
2e1ab36240
microinstruction: Also track MostSignificantBit and IsZero{32,64} as pseudoops
2022-07-19 22:02:56 +01:00
Merry
ac19912fe7
microinstruction: Optimize storage of associated pseudooperation
2022-07-19 22:02:18 +01:00
Merry
51a89dbb7a
A64CallbackConfigPass: Ensure IR instructions emitted by this pass have correct location descriptors attached
2022-07-17 22:42:56 +01:00
Merry
da5d06c32a
backend/x64: Remove unused member halt_requested from StackLayout
2022-07-15 15:19:01 +01:00
Merry
840982be95
block_of_code: Remove far code machinery
2022-07-14 08:58:00 +01:00
Merry
dd60f4b7d8
emit_x64_memory: Use deferred emits
2022-07-14 08:58:00 +01:00
Merry
0d1e4fc4a8
a32_emit_x64: Remove use of far code from EmitTerminalImpl LinkBlock
2022-07-14 08:58:00 +01:00
Merry
36f6114559
emit_x64_vector_floating_point: Use deferred emits
2022-07-14 08:58:00 +01:00
Merry
7d5e078baa
emit_x64_floating_point: MSVC fixup
2022-07-14 08:58:00 +01:00
Merry
11ba75b7f0
emit_x64_floating_point: Use deferred emits
2022-07-14 08:58:00 +01:00
Merry
6c38ed8a89
emit_x86: Introduce the concept of deferred emits
...
Remove the concept of the far code region
2022-07-14 08:58:00 +01:00
