415 Commits

Author SHA1 Message Date
MerryMage
b6bff56523 translate_thumb: Update current_instruction_size in TranslateSingleThumbInstruction 2021-05-16 10:31:30 +01:00
MerryMage
1643e8f3c6 translate_thumb: VFP/ASIMD conflict with coprocessor instructions 2021-05-15 20:54:35 +01:00
MerryMage
b93ae62acf thumb32: Add coprocessor instructions 2021-05-13 18:15:35 +01:00
MerryMage
05a6b5f623 translate_thumb: Permit ASIMD element or structure load/store instructions to be translated 2021-05-07 12:47:55 +01:00
sunho
cb79bfa1dc thumb32: Support setflags in shift reg instructions 2021-05-05 11:47:49 +01:00
MerryMage
075fdeaee0 thumb32: Add Rn argument to ADD/SUB (Plain Binary Immediate) 2021-05-05 11:47:49 +01:00
MerryMage
462c884685 frontend/A32: Correct more IT state 2021-05-04 16:25:24 +01:00
MerryMage
c5f5c1d40f frontend: Standardize emitted IR for exception raising 2021-05-04 16:14:26 +01:00
MerryMage
f8d8ea0deb thumb32: Implement MRS (register) 2021-05-04 12:43:51 +01:00
MerryMage
61333917a4 thumb32: Implement MRS (register) 2021-05-04 12:43:38 +01:00
MerryMage
a5a210a9a5 T32: Add ASIMD instructions 2021-05-04 00:09:55 +01:00
MerryMage
d1e62b9993 T32: Add VFP instructions 2021-05-04 00:09:55 +01:00
MerryMage
cd837c5b37 A32: Merge ArmTranslateVistor and ThumbTranslateVisitor 2021-05-04 00:09:55 +01:00
MerryMage
e19f898aa2 ir: Reorganize to new top level folder 2021-04-21 22:22:07 +01:00
Lioncash
f5263cc196 thumb32: Implement exclusive loads
Implements the remaining loads for ARMv7
2021-04-19 19:46:19 +01:00
MerryMage
9c6332fcbd thumb32_load_store_dual: imm8 in STREX should be shifted left by 2 2021-04-19 18:57:28 +01:00
Lioncash
6241ff6be2 thumb32: Implement STREX variants
Implements the exclusive store instructions. Now all that remains for
ARMv7 load/stores to be done is the exclusive loads.
2021-04-10 17:15:19 +01:00
Lioncash
5873e6b955 thumb32: Implement LDRD (immediate) 2021-03-13 15:29:56 -05:00
Lioncash
9757e2353f thumb32: Implement LDRD (literal) 2021-03-13 15:29:56 -05:00
Lioncash
a74843ca17 thumb32: Implement STRD 2021-03-13 15:29:56 -05:00
Lioncash
258ca93c53 thumb32: Implement TBB/TBH 2021-03-13 15:29:49 -05:00
Lioncash
1d0b705996 thumb32: Implement PUSH
This can be handled as an alias for STMDB.
2021-03-12 19:54:35 -05:00
Lioncash
9cb4790428 thumb32: Implement POP
This can just be treated as an alias to LDMIA
2021-03-12 19:43:47 -05:00
Lioncash
39edee70ff thumb32: Implement LDMDB/LDMEA 2021-03-12 19:35:28 -05:00
Lioncash
ae83713f4f thumb32: Simplify existing store functions into helper function
We can also make a STM helper.
2021-03-12 19:30:29 -05:00
Lioncash
0d887d9ecd thumb32: Implement LDMIA/LDMFD 2021-03-12 19:26:03 -05:00
Lioncash
714ccf13dd thumb32: Implement STMDB/STMFD 2021-03-12 19:05:39 -05:00
Lioncash
91c4d59da9 thumb32: Implement STMIA/STMEA 2021-03-12 19:05:15 -05:00
merry
543ba4e61f
Merge pull request #589 from lioncash/adr
thumb32: Implement plain binary immediate ADR variants
2021-03-12 23:10:23 +00:00
Lioncash
85b8adeb32 thumb32: Implement plain binary immediate ADR variants
Now all the plain binary immediate instructions are implemented.
2021-03-12 18:05:41 -05:00
Lioncash
bd02d9e27f thumb32: Implement STR immediate variants 2021-03-12 14:03:40 -05:00
Lioncash
2521314384 thumb32: Implement STRH immediate variants 2021-03-12 13:55:39 -05:00
Lioncash
cbf9027278 thumb32: Implement STRB immediate variants 2021-03-12 13:33:11 -05:00
Lioncash
921998f6e9 thumb32: Implement LDRSH variants 2021-03-09 18:11:33 -05:00
Lioncash
7a9bdc8f21 thumb32: Implement LDRH variants 2021-03-09 17:12:46 -05:00
Lioncash
3d7e81e7d1 thumb32: Implement LDR variants 2021-03-09 13:12:15 -05:00
MerryMage
646fd05920 thumb32: Implement RSB (reg) 2021-03-06 19:49:44 +00:00
MerryMage
3f97cb1f9b thumb32: Implement SUB (reg) 2021-03-06 19:49:44 +00:00
MerryMage
17bdb54d30 thumb32: Implement CMP (reg) 2021-03-06 19:49:44 +00:00
MerryMage
a63271fd3b thumb32: Implement SBC (reg) 2021-03-06 19:49:44 +00:00
MerryMage
95189b78ef thumb32: Implement ADC (reg) 2021-03-06 19:49:44 +00:00
MerryMage
af33155ef8 thumb32: Implement ADD (reg) 2021-03-06 19:49:44 +00:00
MerryMage
41ac9971f4 thumb32: Implement CMN (reg) 2021-03-06 19:49:44 +00:00
MerryMage
e7ecd3a7ee thumb32: Implement PKHBT, PKHTB 2021-03-06 19:49:44 +00:00
MerryMage
d2d996e6ba thumb32: Implement EOR (reg) 2021-03-06 19:49:44 +00:00
MerryMage
158a13173c thumb32: Implement AND (reg) 2021-03-06 19:49:44 +00:00
MerryMage
c253b8fc51 thumb32: Implement TST (reg) 2021-03-06 19:49:44 +00:00
merry
ea5d8a3047
Merge pull request #584 from lioncash/loads
thumb32: Implement Thumb-2 Load Byte and Memory Hints instructions
2021-03-06 17:31:45 +00:00
MerryMage
531bb42ab5 thumb32: Implement B (T3) 2021-03-06 17:29:55 +00:00
MerryMage
86aa3f0701 thumb32: Implement B (T4) 2021-03-06 17:27:54 +00:00