mirror of
https://github.com/azahar-emu/dynarmic
synced 2025-11-07 07:29:59 +01:00
111 lines
3.7 KiB
C++
111 lines
3.7 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/assert.h"
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#include "frontend/ir/ir.h"
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#include "ir_opt/passes.h"
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namespace Dynarmic {
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namespace Optimization {
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void GetSetElimination(IR::Block& block) {
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#if 0
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using Iterator = decltype(block.instructions.begin());
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struct RegisterInfo {
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IR::ValuePtr register_value = nullptr;
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bool set_instruction_present = false;
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Iterator last_set_instruction;
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};
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std::array<RegisterInfo, 15> reg_info;
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RegisterInfo n_info;
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RegisterInfo z_info;
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RegisterInfo c_info;
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RegisterInfo v_info;
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const auto do_set = [&block](RegisterInfo& info, IR::ValuePtr value, Iterator set_inst) {
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if (info.set_instruction_present) {
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(*info.last_set_instruction)->Invalidate();
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block.instructions.erase(info.last_set_instruction);
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}
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info.register_value = value;
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info.set_instruction_present = true;
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info.last_set_instruction = set_inst;
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};
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const auto do_get = [](RegisterInfo& info, Iterator get_inst) {
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if (!info.register_value) {
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info.register_value = *get_inst;
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return;
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}
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(*get_inst)->ReplaceUsesWith(info.register_value);
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};
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for (auto iter = block.instructions.begin(); iter != block.instructions.end(); ++iter) {
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switch ((*iter)->GetOpcode()) {
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case IR::Opcode::SetRegister: {
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auto inst = reinterpret_cast<IR::Inst*>((*iter).get());
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Arm::Reg reg = reinterpret_cast<IR::ImmRegRef*>(inst->GetArg(0).get())->value;
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if (reg == Arm::Reg::PC)
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break;
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size_t reg_index = static_cast<size_t>(reg);
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do_set(reg_info[reg_index], inst->GetArg(1), iter);
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break;
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}
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case IR::Opcode::GetRegister: {
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auto inst = reinterpret_cast<IR::Inst*>((*iter).get());
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Arm::Reg reg = reinterpret_cast<IR::ImmRegRef*>(inst->GetArg(0).get())->value;
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ASSERT(reg != Arm::Reg::PC);
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size_t reg_index = static_cast<size_t>(reg);
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do_get(reg_info[reg_index], iter);
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break;
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}
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case IR::Opcode::SetNFlag: {
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auto inst = reinterpret_cast<IR::Inst*>((*iter).get());
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do_set(n_info, inst->GetArg(0), iter);
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break;
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}
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case IR::Opcode::GetNFlag: {
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do_get(n_info, iter);
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break;
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}
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case IR::Opcode::SetZFlag: {
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auto inst = reinterpret_cast<IR::Inst*>((*iter).get());
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do_set(z_info, inst->GetArg(0), iter);
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break;
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}
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case IR::Opcode::GetZFlag: {
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do_get(z_info, iter);
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break;
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}
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case IR::Opcode::SetCFlag: {
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auto inst = reinterpret_cast<IR::Inst*>((*iter).get());
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do_set(c_info, inst->GetArg(0), iter);
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break;
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}
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case IR::Opcode::GetCFlag: {
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do_get(c_info, iter);
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break;
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}
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case IR::Opcode::SetVFlag: {
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auto inst = reinterpret_cast<IR::Inst*>((*iter).get());
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do_set(v_info, inst->GetArg(0), iter);
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break;
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}
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case IR::Opcode::GetVFlag: {
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do_get(v_info, iter);
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break;
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}
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default:
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break;
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}
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}
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#endif
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}
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} // namespace Optimization
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} // namespace Dynarmic
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