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https://github.com/azahar-emu/dynarmic
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828959caed
Implement ASIMD VCVT (half) in terms of this instruction. Correct handling of ASIMDStandardValue.
106 lines
3.6 KiB
C++
106 lines
3.6 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* SPDX-License-Identifier: 0BSD
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*/
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#pragma once
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#include <optional>
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#include "dynarmic/common/bit_util.h"
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#include "dynarmic/common/common_types.h"
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#include "dynarmic/common/fp/rounding_mode.h"
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namespace Dynarmic::Backend::X64 {
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// Redefinition of _MM_CMPINT_* constants for use with the 'vpcmp' instruction
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namespace CmpInt {
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constexpr u8 Equal = 0x0;
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constexpr u8 LessThan = 0x1;
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constexpr u8 LessEqual = 0x2;
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constexpr u8 False = 0x3;
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constexpr u8 NotEqual = 0x4;
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constexpr u8 NotLessThan = 0x5;
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constexpr u8 GreaterEqual = 0x5;
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constexpr u8 NotLessEqual = 0x6;
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constexpr u8 GreaterThan = 0x6;
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constexpr u8 True = 0x7;
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} // namespace CmpInt
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// Used to generate ternary logic truth-tables for vpternlog
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// Use these to directly refer to terms and perform binary operations upon them
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// and the resulting value will be the ternary lookup table
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// ex:
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// (Tern::a | ~Tern::b) & Tern::c
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// = 0b10100010
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// = 0xa2
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// vpternlog a, b, c, 0xa2
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//
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// ~(Tern::a ^ Tern::b) & Tern::c
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// = 0b10000010
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// = 0x82
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// vpternlog a, b, c, 0x82
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namespace Tern {
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constexpr u8 a = 0b11110000;
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constexpr u8 b = 0b11001100;
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constexpr u8 c = 0b10101010;
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} // namespace Tern
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// Opcodes for use with vfixupimm
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enum class FpFixup : u8 {
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A = 0b0000, // A
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B = 0b0001, // B
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QNaN_B = 0b0010, // QNaN with sign of B
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IndefNaN = 0b0011, // Indefinite QNaN (Negative QNaN with no payload on x86)
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NegInf = 0b0100, // -Infinity
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PosInf = 0b0101, // +Infinity
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Inf_B = 0b0110, // Infinity with sign of B
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NegZero = 0b0111, // -0.0
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PosZero = 0b1000, // +0.0
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NegOne = 0b1001, // -1.0
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PosOne = 0b1010, // +1.0
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Half = 0b1011, // 0.5
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Ninety = 0b1100, // 90.0
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HalfPi = 0b1101, // PI/2
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PosMax = 0b1110, // +{FLT_MAX,DBL_MAX}
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NegMax = 0b1111, // -{FLT_MAX,DBL_MAX}
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};
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// Generates 32-bit LUT for vfixupimm instruction
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constexpr u32 FixupLUT(FpFixup src_qnan = FpFixup::A,
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FpFixup src_snan = FpFixup::A,
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FpFixup src_zero = FpFixup::A,
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FpFixup src_posone = FpFixup::A,
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FpFixup src_neginf = FpFixup::A,
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FpFixup src_posinf = FpFixup::A,
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FpFixup src_pos = FpFixup::A,
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FpFixup src_neg = FpFixup::A) {
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u32 fixup_lut = 0;
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fixup_lut = Common::ModifyBits<0, 3, u32>(fixup_lut, static_cast<u32>(src_qnan));
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fixup_lut = Common::ModifyBits<4, 7, u32>(fixup_lut, static_cast<u32>(src_snan));
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fixup_lut = Common::ModifyBits<8, 11, u32>(fixup_lut, static_cast<u32>(src_zero));
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fixup_lut = Common::ModifyBits<12, 15, u32>(fixup_lut, static_cast<u32>(src_posone));
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fixup_lut = Common::ModifyBits<16, 19, u32>(fixup_lut, static_cast<u32>(src_neginf));
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fixup_lut = Common::ModifyBits<20, 23, u32>(fixup_lut, static_cast<u32>(src_posinf));
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fixup_lut = Common::ModifyBits<24, 27, u32>(fixup_lut, static_cast<u32>(src_pos));
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fixup_lut = Common::ModifyBits<28, 31, u32>(fixup_lut, static_cast<u32>(src_neg));
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return fixup_lut;
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}
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constexpr std::optional<int> ConvertRoundingModeToX64Immediate(FP::RoundingMode rounding_mode) {
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switch (rounding_mode) {
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case FP::RoundingMode::ToNearest_TieEven:
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return 0b00;
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case FP::RoundingMode::TowardsPlusInfinity:
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return 0b10;
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case FP::RoundingMode::TowardsMinusInfinity:
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return 0b01;
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case FP::RoundingMode::TowardsZero:
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return 0b11;
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default:
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return std::nullopt;
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}
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}
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} // namespace Dynarmic::Backend::X64
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