Logo
Explore
Register Sign In
Azahar-Mirror/dynarmic
1
0
Fork 0
You've already forked dynarmic
mirror of https://github.com/azahar-emu/dynarmic synced 2025-11-08 08:00:01 +01:00
Code Issues Packages Projects Releases Wiki Activity
dynarmic/src/frontend/ir
History
MerryMage a63fc6c89b A64: Implement ADD (vector, vector)
2020-04-22 20:42:46 +01:00
..
basic_block.cpp
A64/translate/branch: bug: Read-after-write error in BLR
2020-04-22 20:42:45 +01:00
basic_block.h
A64: Optimization: Merge interpret blocks
2020-04-22 20:42:45 +01:00
cond.h
Label A32 specific code appropriately
2020-04-22 20:33:30 +01:00
ir_emitter.cpp
A64: Implement ADD (vector, vector)
2020-04-22 20:42:46 +01:00
ir_emitter.h
A64: Implement ADD (vector, vector)
2020-04-22 20:42:46 +01:00
location_descriptor.cpp
A64: Implement SVC
2020-04-22 20:42:45 +01:00
location_descriptor.h
ir/location_descriptor: Add missing <functional> header for std::hash
2020-04-22 20:42:45 +01:00
microinstruction.cpp
reg_alloc: Consider bitwidth of data and registers when emitting instructions
2020-04-22 20:42:46 +01:00
microinstruction.h
reg_alloc: Consider bitwidth of data and registers when emitting instructions
2020-04-22 20:42:46 +01:00
opcodes.cpp
A64: Implement ADD_shifted
2020-04-22 20:42:44 +01:00
opcodes.h
IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128
2020-04-22 20:42:46 +01:00
opcodes.inc
A64: Implement ADD (vector, vector)
2020-04-22 20:42:46 +01:00
terminal.h
A64: Optimization: Merge interpret blocks
2020-04-22 20:42:45 +01:00
value.cpp
IR: Implement Conditional Select
2020-04-22 20:42:45 +01:00
value.h
IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128
2020-04-22 20:42:46 +01:00
Powered by Gitea Version: 1.23.7 Page: 129ms Template: 11ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API