mirror of
https://github.com/azahar-emu/dynarmic
synced 2025-11-07 15:40:00 +01:00
121 lines
4.5 KiB
C++
121 lines
4.5 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* SPDX-License-Identifier: 0BSD
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*/
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#pragma once
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#include "common/assert.h"
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#include "frontend/imm.h"
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#include "frontend/A32/ir_emitter.h"
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#include "frontend/A32/location_descriptor.h"
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#include "frontend/A32/translate/translate.h"
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#include "frontend/A32/types.h"
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namespace Dynarmic::A32 {
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enum class Exception;
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struct ThumbTranslatorVisitor final {
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using instruction_return_type = bool;
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explicit ThumbTranslatorVisitor(IR::Block& block, LocationDescriptor descriptor, const TranslationOptions& options) : ir(block, descriptor), options(options) {
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ASSERT_MSG(descriptor.TFlag(), "The processor must be in Thumb mode");
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}
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A32::IREmitter ir;
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TranslationOptions options;
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bool InterpretThisInstruction();
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bool UnpredictableInstruction();
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bool UndefinedInstruction();
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bool RaiseException(Exception exception);
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// thumb16
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bool thumb16_LSL_imm(Imm<5> imm5, Reg m, Reg d);
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bool thumb16_LSR_imm(Imm<5> imm5, Reg m, Reg d);
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bool thumb16_ASR_imm(Imm<5> imm5, Reg m, Reg d);
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bool thumb16_ADD_reg_t1(Reg m, Reg n, Reg d);
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bool thumb16_SUB_reg(Reg m, Reg n, Reg d);
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bool thumb16_ADD_imm_t1(Imm<3> imm3, Reg n, Reg d);
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bool thumb16_SUB_imm_t1(Imm<3> imm3, Reg n, Reg d);
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bool thumb16_MOV_imm(Reg d, Imm<8> imm8);
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bool thumb16_CMP_imm(Reg n, Imm<8> imm8);
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bool thumb16_ADD_imm_t2(Reg d_n, Imm<8> imm8);
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bool thumb16_SUB_imm_t2(Reg d_n, Imm<8> imm8);
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bool thumb16_AND_reg(Reg m, Reg d_n);
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bool thumb16_EOR_reg(Reg m, Reg d_n);
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bool thumb16_LSL_reg(Reg m, Reg d_n);
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bool thumb16_LSR_reg(Reg m, Reg d_n);
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bool thumb16_ASR_reg(Reg m, Reg d_n);
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bool thumb16_ADC_reg(Reg m, Reg d_n);
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bool thumb16_SBC_reg(Reg m, Reg d_n);
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bool thumb16_ROR_reg(Reg m, Reg d_n);
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bool thumb16_TST_reg(Reg m, Reg n);
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bool thumb16_RSB_imm(Reg n, Reg d);
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bool thumb16_CMP_reg_t1(Reg m, Reg n);
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bool thumb16_CMN_reg(Reg m, Reg n);
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bool thumb16_ORR_reg(Reg m, Reg d_n);
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bool thumb16_MUL_reg(Reg n, Reg d_m);
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bool thumb16_BIC_reg(Reg m, Reg d_n);
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bool thumb16_MVN_reg(Reg m, Reg d);
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bool thumb16_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo);
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bool thumb16_CMP_reg_t2(bool n_hi, Reg m, Reg n_lo);
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bool thumb16_MOV_reg(bool d_hi, Reg m, Reg d_lo);
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bool thumb16_LDR_literal(Reg t, Imm<8> imm8);
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bool thumb16_STR_reg(Reg m, Reg n, Reg t);
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bool thumb16_STRH_reg(Reg m, Reg n, Reg t);
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bool thumb16_STRB_reg(Reg m, Reg n, Reg t);
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bool thumb16_LDRSB_reg(Reg m, Reg n, Reg t);
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bool thumb16_LDR_reg(Reg m, Reg n, Reg t);
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bool thumb16_LDRH_reg(Reg m, Reg n, Reg t);
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bool thumb16_LDRB_reg(Reg m, Reg n, Reg t);
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bool thumb16_LDRSH_reg(Reg m, Reg n, Reg t);
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bool thumb16_STR_imm_t1(Imm<5> imm5, Reg n, Reg t);
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bool thumb16_LDR_imm_t1(Imm<5> imm5, Reg n, Reg t);
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bool thumb16_STRB_imm(Imm<5> imm5, Reg n, Reg t);
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bool thumb16_LDRB_imm(Imm<5> imm5, Reg n, Reg t);
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bool thumb16_STRH_imm(Imm<5> imm5, Reg n, Reg t);
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bool thumb16_LDRH_imm(Imm<5> imm5, Reg n, Reg t);
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bool thumb16_STR_imm_t2(Reg t, Imm<8> imm8);
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bool thumb16_LDR_imm_t2(Reg t, Imm<8> imm8);
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bool thumb16_ADR(Reg d, Imm<8> imm8);
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bool thumb16_ADD_sp_t1(Reg d, Imm<8> imm8);
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bool thumb16_ADD_sp_t2(Imm<7> imm7);
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bool thumb16_SUB_sp(Imm<7> imm7);
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bool thumb16_NOP();
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bool thumb16_SEV();
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bool thumb16_SEVL();
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bool thumb16_WFE();
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bool thumb16_WFI();
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bool thumb16_YIELD();
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bool thumb16_SXTH(Reg m, Reg d);
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bool thumb16_SXTB(Reg m, Reg d);
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bool thumb16_UXTH(Reg m, Reg d);
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bool thumb16_UXTB(Reg m, Reg d);
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bool thumb16_PUSH(bool M, RegList reg_list);
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bool thumb16_POP(bool P, RegList reg_list);
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bool thumb16_SETEND(bool E);
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bool thumb16_CPS(bool, bool, bool, bool);
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bool thumb16_REV(Reg m, Reg d);
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bool thumb16_REV16(Reg m, Reg d);
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bool thumb16_REVSH(Reg m, Reg d);
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bool thumb16_BKPT([[maybe_unused]] Imm<8> imm8);
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bool thumb16_STMIA(Reg n, RegList reg_list);
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bool thumb16_LDMIA(Reg n, RegList reg_list);
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bool thumb16_CBZ_CBNZ(bool nonzero, Imm<1> i, Imm<5> imm5, Reg n);
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bool thumb16_UDF();
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bool thumb16_BX(Reg m);
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bool thumb16_BLX_reg(Reg m);
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bool thumb16_SVC(Imm<8> imm8);
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bool thumb16_B_t1(Cond cond, Imm<8> imm8);
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bool thumb16_B_t2(Imm<11> imm11);
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// thumb32
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bool thumb32_BL_imm(Imm<11> hi, Imm<11> lo);
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bool thumb32_BLX_imm(Imm<11> hi, Imm<11> lo);
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bool thumb32_UDF();
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};
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} // namespace Dynarmic::A32
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