MerryMage c6ecc835b6 ASIMD: Implement VCVT (between half-precision and single-precision)

2021-05-16 23:48:29 +01:00

..

decoder

ASIMD: Implement VCVT (between half-precision and single-precision)

2021-05-16 23:48:29 +01:00

disassembler

A32/thumb16: Implement IT instruction

2021-02-07 20:41:48 +00:00

translate

ASIMD: Implement VCVT (between half-precision and single-precision)

2021-05-16 23:48:29 +01:00

FPSCR.h

Relicense to 0BSD

2020-04-23 15:45:57 +01:00

ir_emitter.cpp

ir: Reorganize to new top level folder

2021-04-21 22:22:07 +01:00

ir_emitter.h

ir: Reorganize to new top level folder

2021-04-21 22:22:07 +01:00

ITState.h

ir: Reorganize to new top level folder

2021-04-21 22:22:07 +01:00

location_descriptor.cpp

Relicense to 0BSD

2020-04-23 15:45:57 +01:00

location_descriptor.h

ir: Reorganize to new top level folder

2021-04-21 22:22:07 +01:00

PSR.h

Relicense to 0BSD

2020-04-23 15:45:57 +01:00

types.cpp

A32/IR: Add SetVector and GetVector

2020-05-28 20:39:19 +01:00

types.h

ir: Reorganize to new top level folder

2021-04-21 22:22:07 +01:00