MerryMage d5283e46e8 IR: Implement IR instructions VectorEqual{8,16,32,64,128}

2020-04-22 20:44:38 +01:00

..

basic_block.cpp

A64/translate/branch: bug: Read-after-write error in BLR

2020-04-22 20:42:45 +01:00

basic_block.h

A64: Optimization: Merge interpret blocks

2020-04-22 20:42:45 +01:00

cond.h

Label A32 specific code appropriately

2020-04-22 20:33:30 +01:00

ir_emitter.cpp

IR: Implement IR instructions VectorEqual{8,16,32,64,128}

2020-04-22 20:44:38 +01:00

ir_emitter.h

IR: Implement IR instructions VectorEqual{8,16,32,64,128}

2020-04-22 20:44:38 +01:00

location_descriptor.cpp

A64: Implement SVC

2020-04-22 20:42:45 +01:00

location_descriptor.h

ir/location_descriptor: Add missing <functional> header for std::hash

2020-04-22 20:42:45 +01:00

microinstruction.cpp

microinstruction: Missed A64{Read,Write}Memory128 from opcode information

2020-04-22 20:44:38 +01:00

microinstruction.h

reg_alloc: Consider bitwidth of data and registers when emitting instructions

2020-04-22 20:42:46 +01:00

opcodes.cpp

A64: Implement ADD_shifted

2020-04-22 20:42:44 +01:00

opcodes.h

IR: Simplify types. F32 -> U32, F64 -> U64, F128 -> U128

2020-04-22 20:42:46 +01:00

opcodes.inc

IR: Implement IR instructions VectorEqual{8,16,32,64,128}

2020-04-22 20:44:38 +01:00

terminal.h

A64: Optimization: Merge interpret blocks

2020-04-22 20:42:45 +01:00

value.cpp

IR: Implement Conditional Select

2020-04-22 20:42:45 +01:00

value.h

IR: Add IR instructions A64Memory{Read,Write}128

2020-04-22 20:44:37 +01:00