mirror of
https://github.com/azahar-emu/dynarmic
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c9777ef997
While initially done to potentially prevent creating bugs due to C++ having a silly type-promotion mechanism involving types < sizeof(int) and unsignedness, given that the bulk of these functions' usages are on exit paths, these can return the correct type to avoid the need to cast at every usage point.
193 lines
7.6 KiB
C++
193 lines
7.6 KiB
C++
/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#include "common/fp/fpsr.h"
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#include "common/fp/info.h"
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#include "common/fp/mantissa_util.h"
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#include "common/fp/process_exception.h"
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#include "common/fp/rounding_mode.h"
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#include "common/fp/unpacked.h"
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#include "common/safe_ops.h"
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namespace Dynarmic::FP {
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template<typename FPT>
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std::tuple<FPType, bool, FPUnpacked> FPUnpackBase(FPT op, FPCR fpcr, FPSR& fpsr) {
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constexpr size_t sign_bit = FPInfo<FPT>::exponent_width + FPInfo<FPT>::explicit_mantissa_width;
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constexpr size_t exponent_high_bit = FPInfo<FPT>::exponent_width + FPInfo<FPT>::explicit_mantissa_width - 1;
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constexpr size_t exponent_low_bit = FPInfo<FPT>::explicit_mantissa_width;
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constexpr size_t mantissa_high_bit = FPInfo<FPT>::explicit_mantissa_width - 1;
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constexpr size_t mantissa_low_bit = 0;
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constexpr int denormal_exponent = FPInfo<FPT>::exponent_min - int(FPInfo<FPT>::explicit_mantissa_width);
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constexpr bool is_half_precision = std::is_same_v<FPT, u16>;
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const bool sign = Common::Bit<sign_bit>(op);
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const FPT exp_raw = Common::Bits<exponent_low_bit, exponent_high_bit>(op);
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const FPT frac_raw = Common::Bits<mantissa_low_bit, mantissa_high_bit>(op);
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if (exp_raw == 0) {
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if constexpr (is_half_precision) {
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if (frac_raw == 0 || fpcr.FZ16()) {
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return {FPType::Zero, sign, {sign, 0, 0}};
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}
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return {FPType::Nonzero, sign, ToNormalized(sign, denormal_exponent, frac_raw)};
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}
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if (frac_raw == 0 || fpcr.FZ()) {
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if (frac_raw != 0) {
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FPProcessException(FPExc::InputDenorm, fpcr, fpsr);
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}
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return {FPType::Zero, sign, {sign, 0, 0}};
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}
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return {FPType::Nonzero, sign, ToNormalized(sign, denormal_exponent, frac_raw)};
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}
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const bool exp_all_ones = exp_raw == Common::Ones<FPT>(FPInfo<FPT>::exponent_width);
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const bool ahp_disabled = is_half_precision && !fpcr.AHP();
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if ((exp_all_ones && !is_half_precision) || (exp_all_ones && ahp_disabled)) {
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if (frac_raw == 0) {
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return {FPType::Infinity, sign, ToNormalized(sign, 1000000, 1)};
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}
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const bool is_quiet = Common::Bit<mantissa_high_bit>(frac_raw);
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return {is_quiet ? FPType::QNaN : FPType::SNaN, sign, {sign, 0, 0}};
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}
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const int exp = static_cast<int>(exp_raw) - FPInfo<FPT>::exponent_bias;
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const u64 frac = static_cast<u64>(frac_raw | FPInfo<FPT>::implicit_leading_bit) << (normalized_point_position - FPInfo<FPT>::explicit_mantissa_width);
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return {FPType::Nonzero, sign, {sign, exp, frac}};
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}
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template std::tuple<FPType, bool, FPUnpacked> FPUnpackBase<u16>(u16 op, FPCR fpcr, FPSR& fpsr);
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template std::tuple<FPType, bool, FPUnpacked> FPUnpackBase<u32>(u32 op, FPCR fpcr, FPSR& fpsr);
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template std::tuple<FPType, bool, FPUnpacked> FPUnpackBase<u64>(u64 op, FPCR fpcr, FPSR& fpsr);
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template<size_t F>
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std::tuple<bool, int, u64, ResidualError> Normalize(FPUnpacked op, int extra_right_shift = 0) {
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const int highest_set_bit = Common::HighestSetBit(op.mantissa);
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const int shift_amount = highest_set_bit - static_cast<int>(F) + extra_right_shift;
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const u64 mantissa = Safe::LogicalShiftRight(op.mantissa, shift_amount);
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const ResidualError error = ResidualErrorOnRightShift(op.mantissa, shift_amount);
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const int exponent = op.exponent + highest_set_bit - normalized_point_position;
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return std::make_tuple(op.sign, exponent, mantissa, error);
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}
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template<typename FPT>
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FPT FPRoundBase(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr) {
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ASSERT(op.mantissa != 0);
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ASSERT(rounding != RoundingMode::ToNearest_TieAwayFromZero);
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constexpr int minimum_exp = FPInfo<FPT>::exponent_min;
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constexpr size_t E = FPInfo<FPT>::exponent_width;
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constexpr size_t F = FPInfo<FPT>::explicit_mantissa_width;
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constexpr bool isFP16 = FPInfo<FPT>::total_width == 16;
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auto [sign, exponent, mantissa, error] = Normalize<F>(op);
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if (((!isFP16 && fpcr.FZ()) || (isFP16 && fpcr.FZ16())) && exponent < minimum_exp) {
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fpsr.UFC(true);
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return FPInfo<FPT>::Zero(sign);
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}
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int biased_exp = std::max<int>(exponent - minimum_exp + 1, 0);
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if (biased_exp == 0) {
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std::tie(sign, exponent, mantissa, error) = Normalize<F>(op, minimum_exp - exponent);
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}
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if (biased_exp == 0 && (error != ResidualError::Zero || fpcr.UFE())) {
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FPProcessException(FPExc::Underflow, fpcr, fpsr);
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}
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bool round_up = false, overflow_to_inf = false;
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switch (rounding) {
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case RoundingMode::ToNearest_TieEven: {
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round_up = (error > ResidualError::Half) || (error == ResidualError::Half && Common::Bit<0>(mantissa));
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overflow_to_inf = true;
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break;
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}
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case RoundingMode::TowardsPlusInfinity:
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round_up = error != ResidualError::Zero && !sign;
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overflow_to_inf = !sign;
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break;
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case RoundingMode::TowardsMinusInfinity:
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round_up = error != ResidualError::Zero && sign;
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overflow_to_inf = sign;
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break;
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default:
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break;
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}
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if (round_up) {
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if ((mantissa & FPInfo<FPT>::mantissa_mask) == FPInfo<FPT>::mantissa_mask) {
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// Overflow on rounding up is going to happen
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if (mantissa == FPInfo<FPT>::mantissa_mask) {
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// Rounding up from denormal to normal
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mantissa++;
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biased_exp++;
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} else {
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// Rounding up to next exponent
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mantissa = (mantissa + 1) / 2;
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biased_exp++;
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}
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} else {
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mantissa++;
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}
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}
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if (error != ResidualError::Zero && rounding == RoundingMode::ToOdd) {
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mantissa = Common::ModifyBit<0>(mantissa, true);
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}
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FPT result = 0;
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#ifdef _MSC_VER
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#pragma warning(push)
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#pragma warning(disable:4127) // C4127: conditional expression is constant
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#endif
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if (!isFP16 || !fpcr.AHP()) {
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#ifdef _MSC_VER
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#pragma warning(pop)
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#endif
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constexpr int max_biased_exp = (1 << E) - 1;
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if (biased_exp >= max_biased_exp) {
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result = overflow_to_inf ? FPInfo<FPT>::Infinity(sign) : FPInfo<FPT>::MaxNormal(sign);
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FPProcessException(FPExc::Overflow, fpcr, fpsr);
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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} else {
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result = sign ? 1 : 0;
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result <<= E;
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result += FPT(biased_exp);
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result <<= F;
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result |= static_cast<FPT>(mantissa) & FPInfo<FPT>::mantissa_mask;
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if (error != ResidualError::Zero) {
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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}
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}
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} else {
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constexpr int max_biased_exp = (1 << E);
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if (biased_exp >= max_biased_exp) {
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result = sign ? 0xFFFF : 0x7FFF;
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FPProcessException(FPExc::InvalidOp, fpcr, fpsr);
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} else {
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result = sign ? 1 : 0;
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result <<= E;
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result += FPT(biased_exp);
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result <<= F;
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result |= static_cast<FPT>(mantissa) & FPInfo<FPT>::mantissa_mask;
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if (error != ResidualError::Zero) {
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FPProcessException(FPExc::Inexact, fpcr, fpsr);
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}
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}
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}
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return result;
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}
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template u16 FPRoundBase<u16>(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr);
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template u32 FPRoundBase<u32>(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr);
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template u64 FPRoundBase<u64>(FPUnpacked op, FPCR fpcr, RoundingMode rounding, FPSR& fpsr);
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} // namespace Dynarmic::FP
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