MerryMage
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e4237c44eb
|
A64: Implement SCVTF (vector, integer), scalar varaint
|
2020-04-22 20:46:16 +01:00 |
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Lioncash
|
ea582b17cc
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A64: Implement SHA256SU1
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
0d50d7314b
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A64: Implement CMGE (zero)'s vector variant
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
ab35dc0e78
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A64: Implement MLS (by element)
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
1651e60462
|
A64: Implement MUL (by element)
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2020-04-22 20:46:16 +01:00 |
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MerryMage
|
a86d4093cd
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A64: Implement MLA (by element)
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
7f47402609
|
A64: Implement ABS (scalar)
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
c8eb4528be
|
A64: Implement SHA256SU0
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
181c3b0790
|
A64: Implement SHA1M
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
47bc97a71b
|
A64: Implement SHA1P
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
718f3e9bb4
|
A64: Implement scalar variants of CMEQ, CMGT, and CMGE zero comparison instructions
These can trivially use the ScalarCompare helper function.
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
3ad4e547e4
|
A64: Implement scalar variant of NEG
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
19e276d10f
|
A64: Implement CMEQ (register, scalar)
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
5b8c9e5146
|
A64: Implement CMHS (register, scalar)
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
78bb12276a
|
A64: Implement CMHI (register, scalar)
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2020-04-22 20:46:16 +01:00 |
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Lioncash
|
c18b20b8d1
|
A64: Implement CMGE (register, scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
755981d0da
|
A64: Implement CMGT (register, scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
da6627124b
|
A64: Implement SHA1C
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
3c013bd9f8
|
A64: Implement SLI (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
154cac594a
|
A64: Implement SRI (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
205ca6b4cb
|
A64: Implement SHA1SU1
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
16a001b9ff
|
A64: Implement SHA1SU0
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
3b6db59850
|
A64: Implement TRN2
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
30e158f8d0
|
A64: Implement TRN1
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
52cad2d9d0
|
A64: Implement SSRA (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
255a33936d
|
A64: Implement SSHR (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
6723b00497
|
A64: Implement USRA (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
d56fa8f735
|
A64: Implement USHR (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
870e418b0b
|
A64: Implement SHL (scalar)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
97f2bea4f2
|
A64: Implement SM3PARTW1
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
20d2491267
|
A64: Implement SM3PARTW2
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
8a60a63a8b
|
A64: Implement SM3TT2B
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
b3d4c02098
|
A64: Implement SM3TT2A
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
7fbccabd81
|
A64: Implement SM3TT1B
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
769373b3ed
|
A64: Implement SM3TT1A
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
d5461be6b4
|
A64: Implement SM3SS1
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
2db032ac83
|
A64: Implement SRI (vector)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
11005cfe26
|
A64: Implement SLI (vector)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
e3d9bf55e7
|
A64: Implement SRSRA (vector)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
bc6016cad7
|
A64: Implement SRSHR (vector)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
a2f8cdf0a3
|
A64: Implement SSUBL/SSUBL2
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
d456fb85c8
|
A64: Implement SADDL/SADDL2
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
5c9e7f328d
|
A64: Implement USUBL/USUBL2
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
88d70e3b8a
|
A64: Implement UADDL/UADDL2
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
56803f5203
|
A64: Implement URSRA (vector)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
8afdf4b23d
|
A64: Implement URSHR (vector)
|
2020-04-22 20:46:16 +01:00 |
|
Lioncash
|
16613ee066
|
A64: Implement RSHRN/RSHRN2
|
2020-04-22 20:46:15 +01:00 |
|
Lioncash
|
937990fd2a
|
A64: Implement SHRN/SHRN2
|
2020-04-22 20:46:15 +01:00 |
|
MerryMage
|
7969871aa3
|
A64: Implement FMOV (vector, immediate) and mark other SIMD modified immediate instructions as unallocated
|
2020-04-22 20:46:15 +01:00 |
|
MerryMage
|
5c95e28ed0
|
A64: Implement ZIP2
|
2020-04-22 20:46:15 +01:00 |
|